The present invention relates to a MOS transistor structure having a trench gate electrode and a reduced on resistance. An important aim in the development of MOS transistor structures, in particular for power transistors, is to reduce the on resistance of the transistor structure. This means that, on the one hand, the static power loss can be minimized and, on the other hand, higher current densities can be achieved, as a result of which smaller and cheaper semiconductor components can be used for the same overall current.
One known method for reducing the on resistance consists in using not a planar transistor structure but a transistor structure which has a trench gate electrode. The disadvantage of such transistor structures, however, is the occurrence of electric field spikes in the vicinity of the gate oxide of the trench electrodes, which, in the event of excessively high source-drain voltages due to avalanche in the adjoining silicon and injection of hot charge carriers, damage the gate oxide and lead to destruction of the component. A remedy to this problem disclosed in the prior art is to extend the body region below the trench gate electrode into the transistor structure. Such an arrangement is illustrated in FIG. 1 and can be gathered for example from WO 98/04004 or from U.S. Pat. No. 5,525,821. In this case, it may also be provided that, as illustrated in FIG. 1, a deep diffusion 8 having a relatively high doping concentration is provided in the body region, so that an avalanche breakdown takes place in the region of this deep diffusion 8. The disadvantage of this transistor structure, however, is that precisely such a deep diffusion has a large lateral extent, which counteracts a reduction in the size of the transistor structures for the purpose of reducing the on resistance.
A further possibility for reducing the on resistance is described in U.S. Pat. No. 5,216,275, where a compensation principle is employed in order to produce a largely intrinsic layer in the turned-off case but a layer of high conductivity in the switched-on case. To that end, instead of a drift region, provision is made of a layer of laterally alternating n-type and p-type regions whose charges largely cancel one another out in the turned-off case.
However, this requires the production of not only a substrate layer, a body region, a source region and a gate electrode but also a separate, specially patterned layer as drift region, which increases the structural outlay of the transistor arrangement.
The object of the present invention, therefore, is to provide a MOS transistor structure having a trench gate electrode which makes it possible to reduce the on resistance in a simple and effective manner.
This object is achieved by means of the features of patent claim 1. The features of patent claims 6 and 10 each describe a method according to the invention for fabricating a MOS transistor structure, particularly a MOS transistor structure as claimed in claims 1 to 5. A further method according to the invention is described by claim 12.
The MOS transistor structures according to the invention each have a highly doped substrate layer of a first conduction type, which defines a first surface of the transistor structure. A drain metallization layer is either provided directly on this first surface or, in the case of an IGBT, an anode zone may additionally be provided in this region, the corresponding metallization layer then being applied on said anode zone.
A body region of a second conduction type extends from a second surface of the transistor structure into the transistor structure. A source region of the first conduction type, which likewise extends from the second surface into the body region, is embedded in this body region.
Furthermore, a gate electrode extends from the second surface of the transistor structure into the transistor structure, and is arranged in a trench lined with a gate oxide. In this case, the trench has a depth which is smaller than the depth of the body region.
Finally, a drift region of the first conduction type is provided, which adjoins the bottom of the trench and extends as far as the substrate layer. In this case, this drift region may have, in particular in the region of the highly doped substrate layer, a lateral extent greater than the lateral extent of the trench of the gate electrode.
The solution according to the invention provides for the integral of the doping concentration of the body region in the lateral direction between two adjacent drift regions to be greater than or equal to the integral of the doping concentration in a drift region in the same lateral direction. The solutions according to the invention prevent an avalanche breakdown in the region of the trench gate electrode, at the same time a structure being provided whose structure size can be varied largely as desired. There are practically no obstacles to reducing the size of the transistor structures, as a result of which it is possible to increase the channel width per area and thus to reduce the on resistance. Moreover, relatively high doping of the body region and of the drift region is possible since the two regions are largely reciprocally depleted in the turned-off case and, consequently, a largely intrinsic region is produced which can effectively take up reverse voltages.
In the turned-on case, however, the increased doping concentration comes to fruition and results in a higher conductivity. This holds true particularly if the integral of the doping concentration of the body region in the lateral direction is equal to the integral of the doping concentration in the adjoining drift region in the same lateral direction. Practically complete reciprocal depletion of the two regions in the turned-off case is achieved here. By contrast, if the integral of the doping concentration of the body region is chosen to be greater than the integral of the doping concentration in the drift region, then a remainder of charge carriers remains in the body region in the turned-off case, whereby it can be ensured that a possible avalanche breakdown takes place in the region of the body region and not in the region of the trench gate electrode.
The present transistor structure is thus constructed significantly more simply than the structure from the prior art, specifically than the structure from U.S. Pat. No. 5,216,275, in which additional patterning of the drift region is also necessary. This is avoided in the case of the present invention by virtue of advantageous adaptation of the body region itself.
A preferred embodiment provides for the integral of the doping concentration in the body region in the lateral direction to be a maximum of 2xc3x971012 cmxe2x88x922. This value generally lies in the region just below the breakdown charge, i.e. that charge in the corresponding body region in the case of which a breakdown would take place at the pn junction to the adjoining drift region before the region can be completely depleted. In order to avoid such a breakdown, the doping concentration is chosen to be correspondingly lower.
It may be provided that the body region is formed by an epitaxial layer. The drift region can then be implemented for example by means of implantation steps, diffusion steps or filling previously formed trenches with semiconductor material. In this respect, reference is made to the description below of various fabrication possibilities. Fabricating doped regions by filling trenches is disclosed in principle in U.S. Pat. No. 5,216,275.
In order, for example, to be able to make the threshold voltage in the channel region independent of the total charge of the body region, it may be provided that the doping concentration of the body region has a gradient. In this case, it is possible to provide a gradient in the lateral direction and/or a gradient in the vertical direction in the body region.
In a first method according to the invention for fabricating a MOS transistor structure, the following steps are carried out:
providing a highly doped substrate layer of a first conduction type,
epitaxially growing a body layer of a second conduction type,
forming a source region in the body layer,
patterning a trench into the body layer, which trench adjoins the source region,
implanting doping material of the first conduction type through the bottom of the trench into the body layer before or after the formation of a gate oxide layer which lines the trench,
the trench with a gate electrode.
Consequently, a body layer is epitaxially grown directly on the highly doped substrate layer, without a drift region also having to be provided between these two layers. In this case, in a preferred embodiment, the doping concentration of the body layer is varied during the growth. A drift region is formed only after the patterning of gate trenches into the body layer. In this case, the doping material is implanted into the body layer in such a way as to produce a drift region which reaches from the bottom of the gate trench as far as the highly doped substrate layer. This can be done by an appropriate choice of the geometry and of the implantation parameters, or by an out diffusion of the doping material as far as the highly doped substrate layer, said out diffusion being carried out after the implantation. As an alternative, it is also possible to carry out a plurality of implantation steps having different implantation energy in order to fabricate a drift region of the desired extent as far as the highly doped substrate layer.
The gate trench can be patterned into the body layer in such a way that it directly adjoins a source region. However, it may also be provided that the trench is patterned into the body layer through a source region, with the result that the trench automatically adjoins the source region and the body layer.
In a further method according to the invention, a MOS transistor structure is fabricated using a construction technique. The following steps are performed in this case:
providing a highly doped substrate layer of a first conduction type,
forming body regions and drift regions by repeated epitaxial growth of a doped partial layer of the first or second conduction type, in which case, after each process of growing the partial layer, regions of the opposite conduction type are produced in the partial layer for the purpose of forming pillar-type structures,
forming source regions in the body regions,
patterning trenches in the drift regions, which adjoin at least one body region and a source region, lining the trenches with a gate oxide layer, and filling the trenches with a gate electrode.
In this case, it may be provided that the pillar-type structures described are formed as early as when the first partial layer is grown. However, it may also be provided that first of all one or more partial layers for forming a further drift region are grown on the highly doped substrate layer. only when subsequent partial layers are grown are the pillar-type structures then formed by the provision of the corresponding regions of the opposite conduction type in the partial layers. In this case, then, when the structure is complete, the body region is a certain distance from the highly doped substrate layer, the two regions being separated from one another by a drift region.
Although this method is somewhat more complicated than the first method due to the need for repeated growth of partial layers and the introduction of doped regions into the partial layers, on the other hand it is possible to set a more exact doping of the different regions, i.e. of the body region and of the drift region, and also their position and extent in the transistor structure.
By contrast, the first method according to the invention has the advantage that, as a result of the epitaxial growth, the body layer can be produced with a relatively precisely defined doping concentration in accordance with the desired specifications, it then being possible for the drift region to be produced by a single or by a plurality of directly successive implantation steps, if appropriate with subsequent outdiffusion.
A third method according to the invention for fabricating a MOS transistor structure has the following steps:
providing a highly doped substrate layer of a first conduction type,
providing a body layer of a second conduction type on the highly doped substrate layer,
forming trenches in the body layer,
filling the trenches with doped semiconductor material of the first conduction type,
etching back the doped semiconductor material on the surface of the transistor structure as far as the body layer, so that drift regions of the first conduction type and body regions of the second conduction type adjoin the surface,
forming source regions in the body regions,
patterning trenches into the drift regions, the trenches adjoining at least one body region and a source region,
lining the trenches with a gate oxide layer,
filling the trenches with a gate electrode.
consequently, the body region can be produced for example by growing an epitaxial layer with a doping of a corresponding conduction type on the highly doped substrate layer, or, if appropriate, on a drift region which has been provided on the highly doped substrate layer. The drift region is then formed by patterning trenches and filling them with semiconductor material. Afterwards, the gate trenches can, for example, be formed using the same mask which was used to produce the trenches for the drift region, insofar as this is allowed by the tolerances for renewed application of this common mask. Consequently, in the ideal case, it is possible to save an additional mask for patterning the gate trenches.
In each of the above-described methods according to the invention, it may be provided that the doping concentration of the body regions and of the drift regions is set in such a way that the integral of the doping concentration in a drift region in the lateral direction between two adjacent body regions is less than or equal to the integral of the doping concentration of the body region in the same lateral direction. As a result of this, it is possible to achieve, as already described, a reciprocal depletion of the regions and hence an increased voltage take up and conductivity of the regions, it being possible at the same time to restrict a possible avalanche breakdown to the region of the body region. In this case, the integral of the doping concentration in a body region in the lateral direction is preferably restricted to a maximum of 2xc3x971012 cmxe2x88x922.